A candidate who has completed his graduation in electronics and communication engineering, is eligible to appear for GATE. GATE is an examination that primarily tests the comprehensive understanding of candidates in various undergraduate subjects of engineering and science for admission into the Master’s Program of institutes as well as jobs at Public Sector Companies. The syllabus of GATE for electronics and communication engineering mainly includes the following:
Network solution methods: Nodal and mesh analysis; Network theorems: superposition, Thevenin and Norton’s, maximum power transfer; Wye‐Delta transformation; Steady state sinusoidal analysis using phasors; Time domain analysis of simple linear circuits; Solution of network equations using Laplace transform; Frequency domain analysis of RLC circuits; Linear 2‐port network parameters: driving point and transfer functions; State equations for networks. Continuous-time signals: Fourier series and Fourier transform representations, sampling theorem and applications; Discrete-time signals: discrete-time Fourier transform (DTFT), DFT, FFT, Z-transform, interpolation of discrete-time signals; LTI systems: definition and properties, causality, stability, impulse response, convolution, poles and zeros, parallel and cascade structure, frequency response, group delay, phase delay, digital filter design techniques.
Energy bands in intrinsic and extrinsic silicon; Carrier transport: diffusion current, drift current, mobility and resistivity; Generation and recombination of carriers; Poisson and continuity equations; P-N junction, Zener diode, BJT, MOS capacitor, MOSFET, LED, photo diode and solar cell; Integrated circuit fabrication process: oxidation, diffusion, ion implantation, photolithography and twin-tub CMOS process.
Small signal equivalent circuits of diodes, BJTs and MOSFETs; Simple diode circuits: clipping, clamping and rectifiers; Single-stage BJT and MOSFET amplifiers: biasing, bias stability, mid frequency small signal analysis and frequency response; BJT and MOSFET amplifiers: multi-stage, differential, feedback, power and operational; Simple op-amp circuits; Active filters; Sinusoidal oscillators: criterion for oscillation, single-transistor and op- amp configurations; Function generators, wave-shaping circuits and 555 timers; Voltage reference circuits; Power supplies: ripple removal and regulation.
Number systems; Combinatorial circuits: Boolean algebra, minimization of functions using Boolean identities and Karnaugh map, logic gates and their static CMOS implementations, arithmetic circuits, code converters, multiplexers, decoders and PLAs; Sequential circuits: latches and flip‐flops, counters, shift‐registers and finite state machines; Data converters: sample and hold circuits, ADCs and DACs; Semiconductor memories: ROM, SRAM, DRAM; 8-bit microprocessor (8085): architecture, programming, memory and I/O interfacing.
Basic control system components; Feedback principle; Transfer function; Block diagram representation; Signal flow graph; Transient and steady-state analysis of LTI systems; Frequency response; Routh-Hurwitz and Nyquist stability criteria; Bode and root-locus plots; Lag, lead and lag-lead compensation; State variable model and solution of state equation of LTI systems.
Random processes: autocorrelation and power spectral density, properties of white noise, filtering of random signals through LTI systems; Analog communications: amplitude modulation and demodulation, angle modulation and demodulation, spectra of AM and FM, super heterodyne receivers, circuits for analog communications; Information theory: entropy, mutual information and channel capacity theorem. Digital communications: PCM, DPCM, digital modulation schemes, amplitude, phase and frequency shift keying (ASK, PSK, FSK), QAM, MAP and ML decoding, matched filter receiver, calculation of bandwidth, SNR and BER for digital modulation; Fundamentals of error correction, Hamming codes; Timing and frequency synchronization, inter-symbol interference and its mitigation; Basics of TDMA, FDMA and CDMA.
Electrostatics; Maxwell’s equations: differential and integral forms and their interpretation, boundary conditions, wave equation, Poynting vector; Plane waves and properties: reflection and refraction, polarization, phase and group velocity, propagation through various media, skin depth; Transmission lines: equations, characteristic impedance, impedance matching, impedance transformation, Sparameters, Smith chart. Waveguides: modes, boundary conditions, cut-off frequencies, dispersion relations; Antennas: antenna types, radiation pattern, gain and directivity, return loss, antenna arrays; Basics of radar; Light propagation in optical fibers.
Mentioned above is the outlined syllabus for GATE. There are minor changes being introduced frequently in the syllabus as well as the nature and weightage of questions.
After qualifying GATE, the candidate can go for further studies like post-graduation and Ph. D. from top tier institutes including IITs and NITs and receive stipend and fellowships based on the performance in the respective course or can apply for job in a PSU. Many PSUs (Public Sector Undertakings) prefer candidates from electronics and communication engineering background among some other selected branches owing to the nature of services they provide and the nature of products they manufacture or deal with.
Some such PSUs that prefer candidates from electronics and communication engineering as their major field of study include:
Bureau of Indian Standards (BIS) shortlists candidates for the interview on the basis of GATE scores. The shortlisted candidates need to appear for the personal interview after completion of the document verification process. The final list of selected candidates is prepared on the basis of merit determined by the aggregate marks obtained by giving 85% weightage to GATE scores and the remaining 15% weightage to marks secured in the interview. The recruitments are conducted for the post of Scientist Grade ‘B’.
Like many other PSUs, the recruitment process takes place in two stages. The candidates are shortlisted for interview on the basis of their GATE scores. Candidates who qualify the interview are recruited as Graduate Engineer Trainees (GET).
The applications are open from April to June. Recruitments are made on the basis of GATE scores and performance in the interview. Recruitments are conducted for various posts depending on qualification. Graduate engineers are recruited as Engineers/Officers, Post – graduate engineers are recruited as Research Officers in Research and Development Center.
Defense Research and Development Organization (DRDO) recruits graduate engineer candidates with electronics and communication engineering as their major discipline. The applications are open during June-July. DRDO conducts a three – step process for recruitment of candidates on the basis of their GATE scores for the post of Scientist Grade ‘B’. The steps include shortlisting through GATE scores, descriptive examination and personal interview.
Candidates with valid GATE scores can apply for programs as per the specified eligibility. Non – GATE candidates can also apply for the programs by appearing for an online test. The candidates are shortlisted on the basis of their performance in GATE or the BARC online test for the interview. Thereafter, the selected candidates are called for a final interview in Mumbai. Candidates who clear the interview are selected as Scientific Officers.
Electronics Corporation of India (ECIL) conducts recruitment for the post of Graduate Engineer Trainees in Mechanical, Electronics and Computer Science Engineering. ECIL Recruitment through GATE offers jobs to engineers with post-training placements at the Headquarters in Hyderabad or in any of Zonal/Branch/Site Offices located across India. The areas include Design & Development, Projects, Marketing, Production, QA and Field of Engineering. GATE scores are taken into consideration while shortlisting the candidates for the personal interview. Final selection is done based on the GATE scores and interview scores of the candidates.
BBNL conducts recruitment through GATE score for candidates who have appeared for any of the papers from the following: Electronics and Communication (EC), Computer Science and Information Technology (CS) and Electrical Engineering (EE) Paper of GATE. It is mandatory for the candidates to hold 4 years of B.Tech degree (graduate engineers) for the position of Executive Trainees.
The applications are open during June – July. The candidates are shortlisted on the basis of GATE scores. Thereafter, the shortlisted candidates need to qualify a group discussion that is followed by personal interview. The final merit list is prepared on the basis of the candidate’s performance in all stages of the recruitment process.Selected candidates are required to undergo a medical test conducted by a board of medical officers of NTPC.
Nuclear Power Corporation of India Limited (NPCIL) is a PSU under the Department of Atomic Energy (DAE), Government of India. It has postponed the application process for recruitment through GATE for this year. Selection for the interview is on the basis of GATE scores. The performance in interview determines the final selection. The selected candidates have to undergo one-year orientation training in any of Nuclear Training Centers of NPCIL. Trainees who successfully complete their orientation training are recruited as Scientific Officer and posted at one of the units of NPCIL located in different parts of the country. The recruitment is done for the position of Executive Trainees.
The applications are open from the first week to the fourth week of April. ONGC shortlists the candidates on the basis of their GATE scores for a personal interview for recruitment to various positions.
Haryana Power Utilities also recruits candidates on the basis of their GATE scores. There is no interview and only GATE scores are considered for selection. The recruitments are held for the post of Assistant Engineer.
The applications are open during August. The candidates are shortlisted on the basis of their GATE scores. The shortlisted candidates need to report for document verification for final selection. Selected candidates for the post of Junior Executive will be required to execute a surety bond for an amount of Rs 7 lakhs to serve AAI for a period of three years after completion of training.
Some PSUs recruit candidates directly on the basis of their GATE scores with some specific required cutoff or percentile while some shortlist the candidates on the basis of their GATE scores for further stages of assessment that may include group discussion, descriptive examination or personal interview or all of these varying from company to company. Every PSU releases its own notification for the job.
ESE or the Engineering Services Examination is conducted by UPSC (Union Public Service Commission). It is conducted in 3 stages – Prelims, Mains and Personal Interview. After qualifying all the three stages, the candidate is recruited as an IES officer. Officers recruited through ESE are mandated to manage and conduct activities in diverse technical fields.
Major posts offered to IES officers of electronics and communication engineering as their major discipline are as follows: